Media Coverage
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2016 | |
|---|---|
| July 14th | Shishpal Rawat: Intel, CEDA, Accellera, Calm Commitment EDACafe |
| March 29th | Specs vs. Implementation; Portable Stimulus; Hardware-Software Differences JB Systems |
| March 3rd | Prove It! The New Era of Design Verification Amelia's Weekly Fish Fry |
| January 2016 | SystemVerilog, a Global Success Story, Celebrates 10 Years Speeding Technology to Market IEEE-SA Standards Focus |
2015 | |
|---|---|
| Summer 2015 | Designing Efficiently for a Low Power World EDACafe |
| March 5th | DVCon: The Imitation Game EDACafe |
| February 11th | Accellera Systems Initiative Forms Portable Stimulus Working Group Electronic Engineering Journal |
| February 11th | Accellera Adds Portable Stimulus Group Semiconductor Engineering |
2014 | |
|---|---|
| September 25th | Intel's Shishpal Rawat: Multiple hats, Singular focus EDACafe |
| July 1st | Accellera Updates UVM Standard Semiconductor Engineering |
| June 3rd | Accellera Enhances Mixed-signal Modeling and Verification in Verilog-AMS 2.4 Standard Low-Power Design |
2013 | |
|---|---|
| March 20th | Accellera publishes SystemC-AMS 2.0 standard Tech Design Forum |
| February 25th | DVCon 2013: Engineers Question EDA Standards Leaders at Accellera "Town Hall" Meeting Cadence Industry Insights Blog |
| February 6th | Master & Commander: DVCon's Stan Krolikoski EDACafe |